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Attacking State-of-the-Art Software Countermeasures—A Case Study for AES
Tillich S., Herbst C.
Cryptographic Hardware and Embedded Systems - CHES 2008, 10th International Workshop Cryptographic Hardware and Embedded Systems, 228-243, (Lecture Notes in Computer Science; vol. 5154)
Enhancing Side-Channel Analysis with Low-Cost Shielding Techniques
Plos T., Hutter M., Herbst C.
Tagungsband, Austrochip 2008, Linz, Austria, October 8, 2008, Proceedings, Austrochip 2008, 90-95
Power Analysis Attacks - Revealing the Secrets of Smart Cards
Mangard S., Oswald M., Popp T.
, Springer
Power Analysis Attacks and Countermeasures
Popp T., Mangard S., Oswald M.
IEEE design & test of computers, Vol. 24(6), 535-543
Power and EM Attacks on Passive 13.56 MHz RFID Devices
Hutter M., Mangard S., Feldhofer M.
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, 9th International Workshop Cryptographic Hardware and Embedded Systems , 320-330, (Lecture Notes in Computer Science (LNCS))
Protecting AES Software Implementations on 32-bit Processors against Power Analysis
Tillich S., Herbst C., Mangard S.
Applied Cryptography and Network Security, 5th International Conference on Applied Cryptography and Network Security, 141-157, (Lecture Notes in Computer Science; vol. 4521)
Template Attacks on Masking - Resistance Is Futile
Oswald E., Mangard S.
Cryptographers´ Track at the RSA Conference, 243-256
Evaluation of the Masked Logic Style MDPL on a Prototype Chip
Popp T., Kirschbaum M., Zefferer T., Mangard S.
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop Cryptographic Hardware and Embedded Systems , 81-94, (Lecture Notes in Computer Science (LNCS))
Symbolic Implementation of Alternating Automata
Bloem R., Cimatti A., Pill I., Roveri M.
International journal of foundations of computer science, Vol. 18(4), 727-743
Specify, Compile, Run: Hardware from PSL
Bloem R., Galler S., Jobstmann B., Piterman N., Pnueli A., Weiglhofer M.
6th International Workshop on Compiler Optimization Meets Compiler Verification, 6-20
Anzu: A Tool for Property Synthesis
Jobstmann B., Galler S., Weiglhofer M., Bloem R.
Proceedings of the 19th International Conference of Computer Aided Verification 2007, 258-262
Interactive presentation: Automatic hardware synthesis from specifications: a case study
Bloem R., Galler S., Jobstmann B., Piterman N., Pnueli A., Weiglhofer M.
Proceedings of the conference on Design, automation and test in Europe, 10th Conference on Design, Automation and Test in Europe, 1188-1193
RAT: A Tool for the Formal Analysis of Requirements
Bloem R., Cavada R., Pill I., Roveri M., Tchaltsev A.
19th International Conference, CAV 2007, Berlin, Germany, July 3-7, 2007. Proceedings, International Conference on Computer Aided Verification, 263-267, (Lecture Notes in Computer Science)
Fault localization and correction with QBF
Staber S., Bloem R.
Theory and Applications of Satisfiability Testing – SAT 2007, International Conference on Theory and Applications of Satisfiability Testing, 355-268, (Lecture notes in computer science)
Attacking DPA-Resistant Logic Styles in Practice
Zefferer T.
, Master's Thesis
Die TU Graz als Leuchtturm für Netzwerk- und Informationssicherheit
Leitold H., Posch R.
, (Forschungsjournal der Technischen Universität Graz)
Current Status of SHA-1
Mendel F., Pramstaller N., Rechberger C., Rijmen V.
Collisions for 70-step SHA-1: On the Full Cost of Collision Search
De Cannière C., Mendel F., Rechberger C.
Selected Areas in Cryptography, 14th International Workshop on Selected Areas in Cryptography, 56-73, (Lecture Notes in Computer Science; vol. 4876)
The Grindahl hash functions
Knudsen L., Rechberger C., Thomsen S.
Fast Software Encryption (FSE) 2007, Fast Software Encryption Workshop, 39-57, (LNCS)
On Authentication With HMAC and Non-Rondom Properties
Rechberger C., Rijmen V.
Financial Cryptography 2007, International Conference on Financial Cryptography and Data Security, 119-113, (LNCS)