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We research cyber security and teach future’s experts
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Die physikalische Sicherheit eingebetteter Systeme
Mangard S.
Datenschutz und Datensicherheit, Vol. 36, 867-871
Exploiting the Difference of Side-Channel Leakages
Hutter M., Kirschbaum M., Plos T., Schmidt J., Mangard S.
Constructive Side-Channel Analysis and Secure Design - COSADE 2012, 3rd International Workshop, Darmstadt, Germany, May 3-4, 2012, Proceedings., International Workshop on Constructive Side-Channel Analysis and Secure Design, 1-16, (Lecture Notes in Computer Science)
Localized Electromagnetic Analysis of Cryptographic Implementations
Heyszl J., Mangard S., Heinz B., Stumpf F., Sigl G.
Cryptographers´ Track at the RSA Conference, 231-244
One for all - all for one: unifying standard differential power analysis attacks
Mangard S., Elisabeth O., Standaert F.
IET Information Security, 100-110
Arithmetic Logic Units with High Error Detection Rates to Counteract Fault Attacks
Medwed M., Mangard S.
Design, Automation and Test in Europe, Design, Automation and Test in Europe Conference and Exhibition
On the Duality of Probing and Fault Attacks
Gammel B., Mangard S.
Journal of Electronic Testing , Vol. 26(4), 483-493
The World Is Not Enough: Another Look on Second-Order DPA
Standaert F., Veyrat-Charvillon N., Oswald E., Gierlichs B., Medwed M., Kasper M., Mangard S.
International Conference on the Theory and Application of Cryptology and Information Security, 112-129
Practical Attacks on Masked Hardware
Popp T., Kirschbaum M., Mangard S.
Topics in Cryptology - CT-RSA 2009, The Cryptographers' Track at the RSA Conference 2009, Cryptographers´ Track at the RSA Conference, 211-225, (Lecture Notes in Computer Science)
Power Analysis Attacks - Revealing the Secrets of Smart Cards
Mangard S., Oswald M., Popp T.
, Springer
Power Analysis Attacks and Countermeasures
Popp T., Mangard S., Oswald M.
IEEE design & test of computers, Vol. 24(6), 535-543
Protecting AES Software Implementations on 32-bit Processors against Power Analysis
Tillich S., Herbst C., Mangard S.
Applied Cryptography and Network Security, 5th International Conference on Applied Cryptography and Network Security, 141-157, (Lecture Notes in Computer Science; vol. 4521)
Power and EM Attacks on Passive 13.56 MHz RFID Devices
Hutter M., Mangard S., Feldhofer M.
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings, 9th International Workshop Cryptographic Hardware and Embedded Systems , 320-330, (Lecture Notes in Computer Science (LNCS))
Template Attacks on Masking - Resistance Is Futile
Oswald E., Mangard S.
Cryptographers´ Track at the RSA Conference, 243-256
Evaluation of the Masked Logic Style MDPL on a Prototype Chip
Popp T., Kirschbaum M., Zefferer T., Mangard S.
Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop Cryptographic Hardware and Embedded Systems , 81-94, (Lecture Notes in Computer Science (LNCS))
Implementation Aspects of the DPA-Resistant Logic Style MDPL
Popp T., Mangard S.
IEEE International Symposium on Circuits and Systems, IEEE International Symposium on Circuits and Systems, 2913-2916
Practical Second-Order DPA Attacks for Masked Smart Card Implementations of Block Ciphers
Oswald M., Mangard S., Herbst C., Tillich S.
Topics in Cryptology - CT-RSA 2006, Cryptographers´ Track at the RSA Conference, 192-207, (Lecture Notes in Computer Science)
An AES Smart Card Implementation resitant to Power Analysis Attacks
Herbst C., Oswald M., Mangard S.
Applied cryptography and Network security, 4th International Conference on Applied Cryptography and Network Security, 239-252, (Lecture Notes in Computer Science)
Pinpointing the Side-Channel Leakage of Masked CMOS Implementations
Mangard S., Schramm K.
Cryptographic Hardware and Embedded Systems - CHES 2006, 8th International Workshop on Cryptographic Hardware and Embedded Systems, 76-90, (Lecture Notes in Computer Science)
Side Channel Analysis Resistant Design Flow
Aigner M., Popp T., Mangard S., Trifiletti A., Menicocci R., Olivieri M., Scotti G.
IEEE International Symposium on Circuits and Systems, IEEE International Symposium on Circuits and Systems, 2209-2212
Verfahren und Schaltung zur Durchführung von Rechenoperationen
Popp T., Mangard S., Aigner M.