Vedad Hadžić

Dipl.-Ing. BSc

Formal Methods, PhD Candidate

Vedad Hadžić officially joined IAIK as a PhD Student in December 2019, but was already an active student research collaborator since 2016. In November 2022 he completed his PhD Proposal Defense and became a PhD Candidate. The main focus of his research is the design and formal verification of side-channel resistant implementations in hardware. This puts him right at the crossover between the Secure Systems and Formal Methods groups at IAIK, which led to several inter-group collaborations on formal side-channel analysis, fault-attack analysis and memory-safety formalization.

+43 316 873 - 5579
vedad.hadzic@tugraz.at
https://www.iaik.tugraz.at
IF02024
TUGRAZ online

Publications

Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults

Tollec S., Hadzic V., Nasahl P., Asavoae M., Bloem R., Couroussé D., Heydemann K., Jan M., Mangard S.
IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 2024(4), 179-204

Closing the Gap: Leakage Contracts for Processors with Transitions and Glitches

Haring J., Hadzic V., Bloem R.
IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 2024(4), 110-132

Quantile: Quantifying Information Leakage

Hadzic V., Cassiers G., Primas R., Mangard S., Bloem R.

Quantile: Quantifying Information Leakage

Hadzic V., Cassiers G., Primas R., Mangard S., Bloem R.
IACR Transactions on Cryptographic Hardware and Embedded Systems, Vol. 2024(1), 433-456

Power Contracts: Provably Complete Power Leakage Models for Processors

Bloem R., Gigerl B., Gourjon M., Hadzic V., Mangard S., Primas R.
CCS 2022 - Proceedings of the 2022 ACM SIGSAC Conference on Computer and Communications Security, 2022 ACM SIGSAC Conference on Computer and Communications Security, 381-395, (Proceedings of the ACM Conference on Computer and Communications Security)

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