Vedad Hadžić

Dipl.-Ing. BSc

Formal Methods, PhD Candidate

Vedad Hadžić officially joined IAIK as a PhD Student in December 2019, but was already an active student research collaborator since 2016. In November 2022 he completed his PhD Proposal Defense and became a PhD Candidate. The main focus of his research is the design and formal verification of side-channel resistant implementations in hardware. This puts him right at the crossover between the Secure Systems and Formal Methods groups at IAIK, which led to several inter-group collaborations on formal side-channel analysis, fault-attack analysis and memory-safety formalization.
+43 316 873 - 5579
vedad.hadzic@tugraz.at
https://www.iaik.tugraz.at
IF02024
TUGRAZ online
Vedad Hadžić

Publications

Coco: Co-Design and Co-Verification of Masked Software Implementations on CPUs

Gigerl B., Hadzic V., Primas R., Mangard S., Bloem R.
Proceedings of the 30th USENIX Security Symposium, 30th USENIX Security Symposium

Take A Way: Exploring the Security Implications of AMD's Cache Way Predictors

Lipp M., Hadzic V., Schwarz M., Perais A., Maurice C., Gruß D.
Proceedings of the 15th ACM Asia Conference on Computer and Communications Security, ASIA CCS 2020, AsiaCCS 2020: The 15th ACM ASIA Conference on Computer and Communications Security, 813–825

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Expansion-Based QBF Solving Without Recursion

Bloem R., Braud-Santoni N., Hadzic V., Egly U., Lonsing F., Seidl M.
arXiv.org e-Print archive, Vol. CoRR

Expansion-Based QBF Solving Without Recursion

Bloem R., Braud-Santoni N., Hadzic V., Egly U., Lonsing F., Seidl M.
fmcad.18, Proceedings of the 18th Conference on Formal Methods in Computer-Aided Design (FMCAD 2018), 18th Conference on Formal Methods in Computer-Aided Design, 40-49

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